As is known to those of skill in the art, silicon dioxide (SiO2) forms the basis of the planar technology. In industrial practice the dielectric coatings for electronic and photonic devices are most frequently formed by thermal oxidation of silicon (Si) in dry or wet oxygen ambient at temperatures ranging from 900° C. to 1200° C. SiO2 can also be deposited by chemical vapor deposition (CVD) techniques at lower temperatures (200° C. to 900° C.) on various substrates.
Thermal and CVD-grown SiO2 based layers are used as, for example, diffusion masks, to passivate device junctions, as electric insulation, as dielectric material in Si technology, and as capping layers for implantation-activation annealing in III-V compound semiconductor technology.
The growth of dielectric films at low temperatures is very attractive for most device applications due to reduced capital costs, improved output levels, as well as addressing some of the technological constraints associated with the growth of dielectric thin films using conventional high-temperature growth/deposition techniques. Thin dielectric film near room-temperature growth/deposition techniques are known in the art and are chiefly used for microelectronic/photonic (optoelectronic) device applications. An example of these low temperature methods are the physical vapor deposition processes which include: (i) nonreactive (conventional) or reactive resistive; (ii) induction or electron beam evaporation; (iii) reactive or nonreactive DC or RF magnetron; and (iv) ion-beam sputtering processes.
The room temperature growth of dielectric layers on semiconductor surfaces using anodic oxidation is also known. Such processes are able to grow SiO2 layers on Si substrates that are up to 200 nm thick and typically consume about 0.43 of the oxide thickness from the underlying Si substrate. This in principle could be used to produce a first layer ARC in a multi-layer ARC structure that passivates the silicon surface. Etching back the so called dead layer of the emitter's surfaces (i.e., the emitter's surfaces not covered by metallization) would be a useful bonus for solar cells and other electronics and optoelectronics device applications.
The use of organometallic solutions to deposit SiO2 dielectric layers is known in the art. The dielectric layer is applied either by dipping the substrate into the organometallic solution, by spraying the organometallic solution on the substrate, or by spinning the substrate after a small amount of the organometallic solution is applied thereto. After the organometallic solution is applied, it is necessary to drive off the solvent part of the solution by heating the substrate to about 400° C.
A large number of patents, patent applications, and published papers describe near room temperature related processes for the deposition of SiO2 and SiO2-xFx layers on various substrates, including silicon surfaces. The so called liquid-phase deposited (LPD) SiO2 technique was initially proposed in 1950 by Thomsen et al. for depositing SiO2 on the surface of soda lime silicate glass. LPD is based on the chemical reaction of H2SiF6 with water to form hydrofluoric acid and solid SiO2. The H2SiF6 solution is initially saturated with SiO2 powder (usually in a sol-gel from). Before immersing the glass into the solution a reagent that reacts with the hydrofluorosilicilic acid such as boric acid may be added to the solution to supersaturate with silica. As shown by Sang M. Han et al., the LPD process is a competition between the deposition and etching of SiO2. Regardless of the small variations in formulations, the overall reversible chemical reaction is:H2SiF6+2H2O6HF+SiO2 One of the major disadvantages of the SiO2 LPD method described above is a very low deposition rate. Using hydrofluorosilicilic acid, SiO2-xFx, deposition rates of 110 nm/hour were claimed by C. F. Yeh et al. The inventors of the present patent application have experimented with the LPD method and discovered that the LPD SiO2 has relatively poor adhesion to the Si surfaces and the maximum growth rate obtained was in actuality less than about 25 nm/hour. Chien-Jung Huang used an optimized SiO2 LPD on Si to show that the maximum SiO2 growth rate on Si is 360 Angstroms/hour (i.e., 36 nm/hour).
High Growth Rate RTWCG SiOX Thin Film Dielectrics: U.S. Pat. Nos. 6,080,683; 6,593,077; and 6,613,697, as well as WO 2012/036760 describe in detail a fast SiOX growth technique using the so called Room Temperature Wet Chemical Growth (RTWCG) of SiOX based thin film dielectric layers on silicon (Si) substrates for a variety of electronics including, but not limited to, microelectronics and optoelectronics (photonics) applications. The above patents and/or published patent applications describe Room Temperature Wet Chemical Growth (RTWCG) methods and processes of SiOX thin film coatings which can be grown on various substrates. Suitable substrates include but are not restricted to Si, Ge, III-V, I-III-VI, and II-VI compound semiconductors. The RTWCG method and process is very well suited to grow thin films on the Si substrates used in the manufacture of silicon-based electronic and photonic (optoelectronic) device applications.
The term RTWCG process of SiOX dielectric layers, as used herein, means a room temperature (e.g., from about 10° C. to about 45° C.) wet chemical growth process of SixOyXx layers where x is from 0.9 to 1.1, y is from 0.9 to 2, and x is from 0 to 1. Si stands for silicon, O stands for oxygen, and X is either fluorine (F), carbon (C), nitrogen (N) or a combination of these with iron (Fe), palladium (Pd), titanium (Ti), or other trace-level metallic and/or non-metallic contaminants depending on the growth system or non-invasive additives used. The trace level metallic and/or non-metallic elements include, but are not limited to, any one or more of the elements or elemental dopants known to those with skill in the semiconductor arts. Additionally, the term “SiOX” as utilized throughout this specification and claims is defined as detailed above with regard to the formula SixOyXx and is defined components.
U.S. Pat. No. 6,080,683, entitled “Room Temperature Wet Chemical Growth Process of SiO Based Oxides on Silicon;” and U.S. Pat. No. 6,593,077 entitled “Method of Making Thin Films Dielectrics Using a Process for Room Temperature Wet Chemical Growth of SiO Based Oxides on a Substrate,” both describe RTWCG SiOX methods and processes on a semiconductor substrate comprising: (a) providing a reaction mixture comprising of a silicon source, a pyridine compound, and an aqueous reduction oxidation solution; (b) additives to enhance the reaction; and (c) reacting the mixture with the substrate to form the silicon oxide layer.
High growth rate RTWCG SiOX thin films, as reveled in U.S. Pat. Nos. 6,080,683 and 6,593,077 were grown using the RTWCG process on silicon and other semiconductor substrates using commercial-grade 34 percent H2SiF6. Other liquid precursors included, but were not limited to, silicon sources such as (NH4)2SiF6, aqueous compounds such as K3Fe(CN)6 and Fe-EDTA, and an electron transfer component such as N-(n-butyl)pyridinium chloride (n-BPCI). High growth-rate growth of SiOX oxide on silicon substrates was achieved by using commercial grade organic and inorganic silicon sources, a pyridine compound (i.e., N-(n-butyl)pyridinium chloride), redox aqueous solutions based on Fe2+/Fe3+, and non-invasive additives including NaF, KOH, NH4F, and HF(aq). In one embodiment of the above inventions, the SiOX growth solution was made by mixing 2 to 5 volume parts 34 percent H2SiF6 with 2 to 5 volume parts 0.5 M K4Fe(CN)6(aq), 1 to 3 parts 60 percent H2TiF6(aq), and 0 to 4 volume parts 5 percent n-BPCl(aq). This solution was saturated with SiO2-containing compounds such as silica, silica gel, and various other additives.
By using the above growth solution formulations, the SiOX oxide layers grown on various semiconductor substrates have a relatively low growth rate and a relatively high metallic and non-metallic impurity concentration. They have inferior electric and dielectric properties compared to the SiOX oxide layers grown using the growth solution formulations described by the U.S. Pat. No. 6,613,697, entitled “Low Metallic Impurity SiO Thin Film Dielectrics on Semiconductor Substrates.” The RTWCG SiOX growth rate on Si surfaces described in the U.S. Pat. No. 6,613,697 ranges from 1 nm/minute to over 100 nm/minute depending on the composition of the growth solution.
In one embodiment of U.S. Pat. No. 6,613,697, all organic components of the growth solution were substituted with inorganic components. Only inorganic components were used for the silicon source and the pyridine-based compounds were eliminated. Various inorganic aqueous Me+n/Me+(n+m) (were n is from 0 to 4 and m is from 1 to 4, inclusive) combinations of redox additives were added to the growth solution as per above. The RTWCG SiOX thin film layers grew on various semiconductor substrates at a higher growth rate and with lower metallic and non-metallic impurity concentration. Also there was an improvement in the dielectric properties of the resulting thin films when compared to the RTWCG SiOX thin films grown in solutions with organic components.
In one embodiment WO 2012/036760 discloses a RTWCG SiOX growth solution formulation that eliminates the need for a silicon source, such as H2SiF6 or any other silicon source found in the prior art RTWCG SiOX growth solution formulations. This embodiment requires HF concentrations ([HF]) to be from 10 percent by weight to 40 percent by weight.
In one embodiment WO 2014/200985 discloses a RTWCG SiOX growth solution which by including certain non-oxidizing acids such as hydrochloric acid (HCl) can utilize [HF] much lower than disclosed in related patents. Due to the drastic reduction of [HF] in solution, the formulations disclosed can be created as concentrated solutions which can be diluted on site. Dilutions of as much as 1 part concentrate to 26 parts water were successfully utilized in inline wet chemical benches.
Anti-Reflection Coatings Prior Art: Anti-reflection coatings (ARC) are included in a solar cell design to substantially reduce the amount of reflected light. Bare Si loses 42 percent of light with long wavelengths of 1.1 μm, 37 percent of light with wavelengths of 1 μm, and about 54 percent of light with short wavelengths of 0.4 μm. A textured front surface, such as regularly spaced pyramids or porous silicon (PS), can lower the AM 1.5 average weighted reflection to between 12 percent to 18 percent over the 0.4 μm to 1.2 μm wavelength range.
The optimal thickness of an anti-reflection coating is calculated by the following formula:
      d    1    =                    λ        0                    4        ⁢                  n          1                      .  For a quarter wavelength ARC made of a transparent material having a refractive index n1, and a light incident on the coating with a free-space wavelength λ0, the thickness which causes minimum reflection is d1. Because the index of refraction is wavelength-dependent, near zero reflection can only occur for a single wavelength. The refractive index and thickness of an ARC must minimize the reflection of light with wavelengths of 0.6 μm since this wavelength is close to the peak power of the solar spectrum. The equations for multiple anti-reflection coatings are more complicated than that for a single layer (see Wang et al.). By properly adjusting the refractive index and thickness of two layers it is theoretically possible to produce two minima and an overall reflectance as low as 3 percent.
A proper SLAR on smooth surfaces (e.g., Mg F2, SiO2, SiO, SiNx, TiO2 and Ta2O5) can reduce the AM 1.5 average weighted reflection (AWR) to a range between 12 percent to 16 percent over the 0.4 μm to 1.1 μm wavelength range. For an optimized CVD-deposited SiNx ARC, which is the norm for silicon solar cell ARC applications, the AM 1.5 AWR is about 12 percent with a simulated minimum AWR of 10.4 percent as calculated by Wright et al. on flat c-Si having an assumed film index of refraction, n, of 1.95, and thickness, d, of 81 nm.
Whether or not the simulated minimum SiNx SLAR AWR is achievable in a production environment remains to be seen. But even if the simulated reflectance is achieved, the reflective losses are still too high at 10.4 percent reflectivity. The industry would still need to create a practical low-cost way of further lowering the reflectance through a double layer ARC, a textured silicon solar cell surface, or both. However, this approach becomes cost prohibitive for most commercial solar cell applications.
For textured surfaces with well-designed single or double layer AR coatings such as ITO/SiO2, ZnS/MgF2, TiO2/MgF2, and TiO2/Al2O3 the AM 1.5 AWR has been brought down to between 3 percent and 8 percent. A large number of studies on double layer ARCs have been reported. The most stable configuration with respect to variations in film thicknesses have been found to be designs with a high refractive index (n) on the substrate and a low refractive index towards the ambient (see Bauhaus et al.).
Both magnesium fluoride/zinc sulfide (MgF2/ZnS) double layers deposited by electron beam sputtering (see Cid et al.) and titanium oxide (TiO2) double layers deposited by Atmospheric Pressure Chemical Vapor Deposition (see Richards) show very low reflectance over a broad wavelength range. However, both techniques require a separate thermally-grown silicon oxide (SiO2) layer for surface passivation. This essentially renders them a triple layer ARC with associated high costs and design flaws such as high absorption of near UV and blue light.
Two TiO2 thin films were deposited on planar silicon wafers using atmospheric pressure chemical vapor deposition (APCVD) system under different deposition conditions. AWR values of 6.5 percent (measured) in air, and 7.0 percent (calculated) under glass were achieved for TiO2 DLAR coatings (see Richards et al.).
Spin-coated TiO2 single-layer, SiO2/TiO2 double-layer (DLAR), and SiO2/SiO2—TiO2/TiO2 triple-layer (TLAR) ARCs were deposited on smooth emitter Si solar cells [Lien et al] with average optical reflectance (from 400 nm to 1000 nm) around 9.3 percent, 6.2 percent and 3.2 percent, respectively. A 39 percent improvement in the efficiency of a c-Si solar cell was achieved with a TLAR ARC.
Jiao & Al claim a record photocurrent gain between 40 percent and 46 percent by using classical TiO2/SiO2 graded DLAR coating. According to Aiken, the complete elimination of reflection losses yields a maximum theoretical photocurrent gain after the ARC of approximately 53 percent.
A seven layer ARC design with graded-index AR coatings, measuring 60 to 160 nm thick, made of silicon dioxide (SiO2) and titanium dioxide (TiO2), was recently reported (see Kuo et al.). The bottom two layers are TiO2, followed by three middle layers of co-sputtered SiO2 and TiO2. The top two layers consist of slanted nano-rods of SiO2 with very low refractive indices of 1.22 and 1.09, the tilt angle of which is created using an oblique-angle deposition technique that precisely determines the refractive index. According to Kuo et al., the overall solar-to-electric efficiency improvement over bare silicon solar cells would be boosted from the 20.5 percent obtained with a quarter-wave coating to 42.7 percent.
Lipinski et al. reported the results of theoretical optical optimization of the graded index oxynitride ARC for silicon solar cells. Lipinski et al. used experimental optical data of SiNx:H layers deposited by RF plasma enhanced chemical vapor deposition system. The highest improvement in short-circuit current (Jsc) of 44.6 percent was obtained with an SiOxNy graded layer for SiNx:H with a low refractive index (2.1 at 600 nm) and abrupt concentration profile which is characteristic of a DLAR SiO2—SiNx:H.
Layers of Stacked Dielectrics: A stacked dielectric is created by growing or depositing two or more distinct materials on top of one another. The materials most commonly utilized in the PV industry include silicon dioxide (SiO2), hydrogenated amorphous silicon nitride (a-SiNx:H), aluminum oxide (Al2O3), titanium oxide (TiO2), and silicon oxynitride (SiOxNy). Stacked dielectrics are most commonly used in order to suppress reflection or for surface passivation. Layers such as a-SiNx:H, SiO2, or Al2O3 can reduce surface recombination if deposited or grown directly on the surface (first layer)—a significant loss mechanism in solar cells. For high efficiency crystalline silicon solar cell applications, thin film SiO2 and Al2O3 layers are used for front and back surface passivation and as the first layer anti-reflection coating (ARC) in a multi-layer ARC structure. SiOxNy or SiNx of low refractive index can be grown on top of SiNx layers of high refractive index to improve the transmission of light into the active parts of the cell.